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connection diagram 14-lead plastic dip and soic 1 2 3 4 5 6 7 14 8 9 10 11 12 13 v+ ?in b +in b out b out d ?in d +in d v? ?in c +in c out c ad8044 top view ?in a +in a out a a quad 150 mhz rail-to-rail amplifier ad8044 features single ad8041 and dual ad8042 also available fully specified at +3 v, +5 v, and 5 v supplies output swings to within 25 mv of either rail input voltage range extends 200 mv below ground no phase reversal with inputs 1 v beyond supplies low power of 2.75 ma/amplifier high speed and fast settling on +5 v 150 mhz ? db bandwidth (g = +1) 170 v/ s slew rate 40 ns settling time to 0.1% good video specifications (r l = 150 , g = +2) gain flatness of 0.1 db to 12 mhz 0.06% differential gain error 0.15 differential phase error low distortion ?8 dbc total harmonic @ 5 mhz outstanding load drive capability drives 30 ma 0.5 v from supply rails applications active filters video switchers distribution amplifiers a/d driver professional cameras ccd imaging systems ultrasound equipment (multichannel) product description the ad8044 is a quad, low power, voltage feedback, high speed amplifier designed to operate on +3 v, +5 v, or 5 v supplies. it has true single-supply capability with an input volt- age range extending 200 mv below the negative rail and within 1v of the positive rail. 5v 2.5v 0v 2 s 1v v s = +5v figure 1. output swing: gain = ?, r l = 2 k w the output voltage swing extends to within 25 mv of each rail, providing the maximum output dynamic range. additionally, it features gain flatness of 0.1 db to 12 mhz, while offering differ- ential gain and phase error of 0.04% and 0.22 on a single +5 v supply. this makes the ad8044 useful for video electronics, such as cameras, video switchers, or any high speed portable equipment. the ad8044? low distortion and fast settling make it ideal for active filter applications. the ad8044 offers low power supply current of 13.1 ma max and can run on a single +3.3 v power supply. these features are ideally suited for portable and battery-powered applications where size and power are critical. the wide bandwidth of 150 mhz, along with 170 v/ m s of slew rate on a single +5 v supply, make the ad8044 useful in many general-purpose, high speed applications where dual power supplies of up to 6 v and single supplies from +3 v to +12 v are needed. the ad8044 is available in 14-lead pdip and soic. normalized gain (db) 1m 10m 100m frequency ( hz ) 15 12 9 6 3 0 ?3 ?6 ?9 v s = +5v g = +1 ?12 18 100k figure 2. frequency response: gain = +1, v s = +5 v rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ?2004 analog devices, inc. all rights reserved.
important links for the ad8044 * last content update 08/19/2013 03:06 pm parametric selection tables find similar products by operating parameters high speed amplifiers selection table documentation an-581: biasing and decoupling op amps in single supply applications an-402: replacing output clamping op amps with input clamping amps an-417: fast rail-to-rail operational amplifiers ease design constraints in low voltage high speed systems an-414: low cost, low power devices for hdsl applications mt-060: choosing between voltage feedback and current feedback op amps mt-059: compensating for the effects of input capacitance on vfb and cfb op amps used in current-to-voltage converters mt-058: effects of feedback capacitance on vfb and cfb op amps mt-056: high speed voltage feedback op amps mt-053: op amp distortion: hd, thd, thd + n, imd, sfdr, mtpr mt-052: op amp noise figure: dont be mislead mt-050: op amp total output noise calculations for second-order system mt-049: op amp total output noise calculations for single-pole system mt-048: op amp noise relationships: 1/f noise, rms noise, and equivalent noise bandwidth mt-047: op amp noise mt-033: voltage feedback op amp gain and bandwidth mt-032: ideal voltage feedback (vfb) op amp a stress-free method for choosing high-speed op amps UG-111: universal evaluation board for quad, high speed op amps offered in 14-lead soic packages evaluation kits & symbols & footprints view the evaluation boards and kits page for documentation and purchasing symbols and footprints design tools, models, drivers & software dbm/dbu/dbv calculator analog filter wizard 2.0 power dissipation vs die temp adisimopamp? opamp stability ad8044a spice macro-model design collaboration community collaborate online with the adi support team and other designers about select adi products. follow us on twitter: www.twitter.com/adi_news like us on facebook: www.facebook.com/analogdevicesinc design support submit your support request here: linear and data converters embedded processing and dsp telephone our customer interaction centers toll free: americas: 1-800-262-5643 europe: 00800-266-822-82 china: 4006-100-006 india: 1800-419-0108 russia: 8-800-555-45-90 quality and reliability lead(pb)-free data sample & buy ad8044 view price & packaging request evaluation board request samples check inventory & purchase find local distributors * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page (labeled 'important links') does not constitute a change to the revision number of the product data sheet. this content may be frequently modified. powered by tcpdf (www.tcpdf.org)
ad8044?pecifications ad8044a parameter conditions min typ max units dynamic performance ? db s mall signal bandwidth, v o < 0.5 v p-p g = +1 80 150 mhz bandwidth for 0.1 db flatness g = +2, r l = 150 w 12 mhz slew rate g = ?, v o = 4 v step 140 170 v/ m s full power response v o = 2 v p-p 26 mhz settling time to 1% g = ?, v o = 2 v step 30 ns settling time to 0.1% 40 ns noise/distortion performance total harmonic distortion f c = 5 mhz, v o = 2 v p-p, g = +2, r l = 1 k w ?8 db input voltage noise f = 10 khz 16 nv/ hz input current noise f = 10 khz 850 fa/ hz differential gain error (ntsc) g = +2, r l = 150 w to 2. 5 v 0.04 % differential phase error (ntsc) g = +2, r l = 150 w to 2. 5 v 0.22 degrees crosstalk f = 5 mhz, r l = 1 k w , g = +2 60 db dc performance input offset voltage 1.0 6 mv t min ? max 8mv offset drift 8 m v/ r c input bias current 2 4.5 m a t min ? max 4.5 m a input offset current 0.2 1.2 m a open-loop gain r l = 1 k w 82 94 db t min ? max 88 db input characteristics input resistance 225 k w input capacitance 1.6 pf input common-mode voltage range ?.2 to 4 v common-mode rejection ratio v cm = 0 v to 3.5 v 80 90 db output characteristics output voltage swing r l = 10 k w to 2.5 v 0.03 to 4.975 v output voltage swing: r l = 1 k w to 2.5 v 0.25 to 4.75 0.075 to 4.91 v output voltage swing: r l = 150 w to 2.5 v 0.55 to 4.4 0.25 to 4.65 v output current t min ? max , v out = 0.5 v to 4.5 v 30 ma short circuit current sourcing 45 ma sinking 85 ma capacitive load drive g = +2 40 pf power supply operating range 312v quiescent current 11 13.1 ma power supply rejection ratio v s = 0, +5 v, 1 v 70 80 db operating temperature range ?0 +85 r c specifications subject to change without notice. (@ t a = +25 c, v s = +5 v, r l = 2 k to 2.5 v, unless otherwise noted.) ? rev. b
specifications ad8044a parameter conditions min typ max units dynamic performance ? db s mall signal bandwidth, v o < 0.5 v p-p g = +1 80 135 mhz bandwidth for 0.1 db flatness g = +2, r l = 150 w 10 mhz slew rate g = ?, v o = 2 v step 110 150 v/ m s full power response v o = 2 v p-p 22 mhz settling time to 1% g = ?, v o = 2 v step 35 ns settling time to 0.1% 55 ns noise/distortion performance total harmonic distortion f c = 5 mhz, v o = 2 v p-p, g = ?, r l = 100 w ?8 db input voltage noise f = 10 khz 16 nv/ hz input current noise f = 10 khz 600 fa/ hz differential gain error (ntsc) g = +2, r l = 150 w to 1.5 v, input v cm = 0. 5 v 0.13 % differential phase error (ntsc) g = +2, r l = 150 w to 1.5 v, input v cm = 0. 5 v 0.3 degrees crosstalk f = 5 mhz, r l = 1 k w , g = +2 60 db dc performance input offset voltage 1.5 5.5 mv t min ? max 7.5 mv offset drift 8 m v/ r c input bias current 2 4.5 m a t min ? max 4.5 m a input offset current 0.2 1.2 m a open-loop gain r l = 1 k w 80 92 db t min ? max 88 db input characteristics input resistance 225 k w input capacitance 1.6 pf input common-mode voltage range ?.2 to 2 v common-mode rejection ratio v cm = 0 v to 1.5 v 76 90 db output characteristics output voltage swing r l = 10 k w to 1.5 v 0.025 to 2.98 v output voltage swing: r l = 1 k w to 1.5 v 0.17 to 2.82 0.06 to 2.93 v output voltage swing: r l = 150 w to 1.5 v 0.35 to 2.55 0.15 to 2.75 v output current t min ? max , v out = 0.5 v to 2.5 v 25 ma short circuit current sourcing 30 ma sinking 50 ma capacitive load drive g = +2 35 pf power supply operating range 312v quiescent current 10.5 12.5 ma power supply rejection ratio v s = 0, +3 v, +0.5 v 70 80 db operating temperature range 0 +70 r c specifications subject to change without notice. ad8044 rev. b ? (@ t a = +25 c, v s = +3 v, r l = 2 k to 1.5 v, unless otherwise noted.)
ad8044?pecifications ad8044a parameter conditions min typ max units dynamic performance ? db s mall signal bandwidth, v o < 0.5 v p-p g = +1 85 160 mhz bandwidth for 0.1 db flatness g = +2, r l = 150 w 15 mhz slew rate g = ?, v o = 8 v step 150 190 v/ m s full power response v o = 2 v p-p 29 mhz settling time to 0.1% g = ?, v o = 2 v step 30 ns settling time to 0.01% 40 ns noise/distortion performance total harmonic distortion f c = 5 mhz, v o = 2 v p-p, g = +2 72 db input voltage noise f = 10 khz 16 nv/ hz input current noise f = 10 khz 900 fa/ hz differential gain error (ntsc) g = +2, r l = 150 w 0.06 % differential phase error (ntsc) g = +2, r l = 150 w 0.15 degrees crosstalk f = 5 mhz, r l = 1 k w , g = +2 60 db dc performance input offset voltage 1.4 6.5 mv t min ? max 9mv offset drift 10 m v/ r c input bias current 2 4.5 m a t min ? max 4.5 m a input offset current 0.2 1.2 m a open-loop gain r l = 1 k w 82 96 db t min ? max 92 db input characteristics input resistance 225 k w input capacitance 1.6 pf input common-mode voltage range ?.2 to 4 v common-mode rejection ratio v cm = ? v to 3.5 v 76 90 db output characteristics output voltage swing r l = 10 k w ?.97 to +4.97 v output voltage swing: r l = 1 k w ?.6 to +4.6 ?.85 to +4.85 v output voltage swing: r l = 150 w ?.0 to +3.8 ?.5 to +4.5 v output current t min ? max , v out = ?.5 v to +4.5 v 30 ma short circuit current sourcing 60 ma sinking 100 ma capacitive load drive g = +2 40 pf power supply operating range 312v quiescent current 11.5 13.6 ma power supply rejection ratio v s = ?, +5 v, 1 v 70 80 db operating temperature range ?0 +85 r c specifications subject to change without notice. rev. b ? (@ t a = +25 c, v s = 5 v, r l = 2 k to 0 v, unless otherwise noted.)
ad8044 rev. b ? absolute maximum ratings 1 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +12.6 v internal power dissipation 2 plastic dip package (n) . . . . . . . . . . . . . . . . . . . 1.6 watts small outline package (r) . . . . . . . . . . . . . . . . . . 1.0 watts input voltage (common-mode) . . . . . . . . . . . . . . v s 0.5 v differential input voltage . . . . . . . . . . . . . . . . . . . . . . . 3.4 v output short circuit duration . . . . . . . . . . . . . . . . . . . . . .o bserve power derating curves storage temperature range (n, r) . . . . . . . ?5 r c to +125 r c lead temperature range (soldering 10 sec) . . . . . . . . +300 r c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for the device in free air: 14-lead plastic package: q ja = 75 r c/w 14-lead soic package: q ja = 120 r c/w maximum power dissipation the maximum power that can be safely dissipated by the ad8044 is limited by the associated rise in junction tempera- ture. the maximum safe junction temperature for plastic encap- sulated devices is determined by the glass transition temperature of the plastic, approximately +150 r c. exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. ex ceeding a junction temperature of +175 r c for an extended period can result in device failure. while the ad8044 is internally short-circuit protected, this may not be sufficient to guarantee that the maximum junction tem- perature (+150 r c) is not exceeded under all conditions. to en sure proper operation, it is necessary to observe the maximum power derating curves. ambient temperature ( c) 2.5 2.0 0.5 ?50 90 ?40 maximum power dissipation (w) ?30 ?20 ?10 0 10 20 30 40 50 60 80 1.5 1.0 70 14-lead soic 14-lead plastic dip package t j = +150 c figure 3. maximum power dissipation vs. temperature caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8016 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device ordering guide temperature package package model range description option ad8044an ?0 r c to +85 r c 14-lead pdip n-14 ad8044ar-14 ?0 r c to +85 r c 14-lead soic r-14 ad8044ar-14-reel ?0 r c to +85 r c 14-lead soic 13" reel r-14 ad8044ar-14-reel7 ?0 r c to +85 r c 14-lead soic 7" reel r-14 ad8044arz-14 * ?0 r c to +85 r c 14-lead plastic soic r-14 ad8044arz-14-reel * ?0 r c to +85 r c 14-lead soic 13" reel r-14 ad8044arz-14-reel7 * ?0 r c to +85 r c 14-lead soic 7" reel r-14 * z = pb free part
11 10 2 6 5 4 3 8 7 9 v os (mv) 3 ?2 ?1 012 ?3 1 0 number of parts in bin ?1.5 ?0.5 0.5 1.5 2.5 ?2.5 v s = +5v t a = +25 c 62 parts mean = 350 v std deviation = 560 v figure 4. typical distribution of v os 15 12 0 2.0 14.0 3.0 number of parts in bin 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 9 6 3 mean = 7.9 v/ c std dev = 2.3 v/ c sample size = 62 v s = +5 v os drift ( v/ c) figure 5. v os drift over ?0 r c to +85 r c temperature ( c ) 2.4 input bias current ( a) 2.2 0 ?45 85 ?35 ?25 ?15 ?5 5 15 25 35 45 55 65 75 2.0 1.8 v s = +5v figure 6. i b vs. temperature load resistance ( ) 100 95 70 0 250 open-loop gain (db) 500 750 1000 1250 1500 2000 90 85 80 v s = +5v t = +25 c 75 1750 figure 7. open-loop gain vs. r l to +2.5 v temperature ( c ) 100 97 85 ?40 ?20 open-loop gain (db) 020406 080 100 94 91 88 v s = +5v r l = 1k to +2.5v figure 8. open-loop gain vs. temperature output voltage ( v ) 100 30 0 05 0.15 open-loop gain (db) 0.35 0.75 1.25 1.75 2.25 2.75 3.25 3.75 4.45 4.65 4.85 90 40 20 10 70 50 80 60 r l = 500 r l = 50 v s = +5v figure 9. open-loop gain vs. output voltage ad8044?ypical performance characteristics ? rev. b
ad8044 rev. b ? frequency ( hz ) input voltage noise (nv/ hz) 300 10 100 1k 10k 100k 1m 10m 100 10 3 1 30 figure 10. input voltage noise vs. frequency fundamental frequency ( mhz ) ?30 ?80 ?100 ?40 ?50 ?60 ?70 ?90 total harmonic distortion (dbc) 110 8 567 9 234 v s = +3v, r l = 100 a v = ?1 v s = +5v, r l = 100 a v = +1 v s = +5v, r l = 100 a v = +2 v s = +5v, r l = 1k a v = +1 v s = +5v, r l = 1k a v = +2 v o = 2v p-p figure 11. total harmonic distortion worst harmonic (dbc) output voltage (v p-p) 0 5 0.5 1 1.5 2 2.5 3 3.5 4 4.5 ?30 ?40 ?120 ?80 ?90 ?100 ?110 ?60 ?70 ?50 ?130 ?140 v s = +5v r l = 2k to 2.5v g = +2 1mhz 5mhz 10mhz figure 12. worst harmonic vs. output voltage diff phase (degrees) 0 100 10 20 30 40 50 60 70 80 90 diff gain (%) ?0.04 0.00 ? 0.02 0.02 0.01 ? 0.01 ? 0.03 0.03 v s = +5v g = +2 r l = 150 ?0.15 0.05 ? 0.05 0.15 0.10 0.00 ? 0.10 0.20 ?0 .20 modulating ramp level ( ire ) v s = +5v g = +2 r l = 150 0 100 10 20 30 40 50 60 70 80 90 figure 13. differential gain and phase errors 0.3 ?0.1 ?0.6 0.2 0.1 0.0 ?0.2 ?0.3 ?0.4 ?0.5 1m 100m 10m normalized gain (db) v s = +5v r f = 200 r l = 150 to 2.5v g = +2 v i = 0.2v p-p 11.6mhz frequency ( hz ) figure 14. 0.1 db gain flatness 80 40 ?10 70 60 50 30 20 10 0 ?20 30k 100k open-loop gain (db) 1m 10m 100m gain phase 80mhz frequency (hz) v s = +5v r l = 2k c l = 5pf 180 135 90 45 0 phase margin ( de g rees ) figure 15. open-loop gain and phase margin vs. frequency
4 0 ?4 3 2 1 ?1 ?2 ?3 ?5 closed-loop gain (db) 1m 10m 100m frequency ( hz ) +85 c +25 c ?40 c v s = +5v r l = 2k to 2.5v c l = 5pf g = +1 v o = 0.2v p-p figure 16. closed-loop frequency response vs. temperature 6 2 ?3 100k 5 4 3 1 0 ?1 ?2 ?4 closed-loop gain (db) 1m 10m 100m frequency (hz) g = +1 r l = 2k c l = 5pf v o = 0.2v p-p +3v +5v 5v +3v +5v 5v figure 17. closed-loop frequency response vs. supply 0.01 100 10 1 0.1 0.03 500 0.1 output resistance ( ) 110 100 frequency (mhz) r bt = 50 r bt = 0 v out r bt g = +1 v s = +5v figure 18. output resistance vs. frequency input steps (v p-p) 60 0 40 30 20 10 50 70 time (ns) 0.5 2 1 1.5 v s = +3v, 1% v s = +3v, 0.1% v s = +5v, 1% and v s = 5v, 1% v s = +5v, 0.1% and v s = 5v, 0.1% g = ?1 r l = 2k figure 19. settling time vs. input step 0 ?40 ?80 ?10 ?20 ?30 ?50 ?60 ?70 0.03 cmrr (db) 110 100 frequency (mhz) 500 0.1 v s = 5v v s = +3v figure 20. cmrr vs. frequency load current ( ma ) 1.00 0.500 0.00 0.875 0.750 0.250 0.125 0.625 0.375 030 36912151 82124 27 output saturation voltage (v) v s = +5v +5v ?v oh (+25 c) +5v ?v oh (?55 c) +5v ?v oh (+125 c) v ol (+125 c) v ol (+25 c) v ol (?55 c) figure 21. output saturation voltage vs. load current ad8044 rev. b ?
ad8044 rev. b ? temperature ( c ) 12.0 9.0 11.5 11.0 10.5 10.0 9.5 ?40 supply current (ma) ?20 0 20 40 60 80 100 v s = 5v v s = +5v v s = +3v figure 22. supply current vs. temperature frequency (mhz) 20 ?10 ?30 ?50 ?70 10 0 ?20 ?40 ?60 ?80 1 500 10 100 0.1 0.01 psrr (db) v s = +5v ?psrr +psrr figure 23. psrr vs. frequency 10 9 0 6 3 2 1 8 7 4 5 v out p-p (v) frequency ( mhz ) v s = 5v r l = 2k 0.1 1 10 100 500 figure 24. output voltage swing vs. frequency load capacitance (p f ) % overshoot 60 40 0 30 20 10 50 0 250 50 100 150 200 g = +2, r s = 0 , v o = 100mv step r f = r g = 750 g = +1, r s = 20 , v o = 100mv step r f = 0, r g = g = +1, r s = 40 , v o = 100mv step r f = 0, r g = g = +3, r s = 0 , v o = 150mv step r f = 750 r g = 375 50 v in ?2.5v +2.5v r f r g r s v out figure 25. % overshoot vs. capacitive load 3 ?1 ?6 100k 1m 10m 100m 500m 2 1 0 ?2 ?3 ?4 ?5 ?7 normalized output (db) frequency (hz) v s = +5v r l = 5k to 2.5v r f = 2k g = +5 g = +10 g = +2 r l = 150 to 2.5v r f = 200 g = +2 figure 26. frequency response vs. closed-loop gain ?10 ?50 ?100 ?20 ?30 ?40 ?60 ?70 ?80 ?90 ?110 0.1 crosstalk (db) 110 100 frequency (mhz) 400 v s = 5v v in = 1v p-p g = +2 r f = 1k r l = 1k r l = 100 figure 27. crosstalk (output to output) vs. frequency
ad8044 5v 0v 100 s 500mv 0.211v v s = +5v r l = 150 to +2.5v c l = 5pf g = ?1 4.656v 2.5v figure 28a. ou tput swing vs. load reference volt age, v s = +5 v, g = ? 5v 2.5v 100 s 500mv v s = +5v r l = 150 to gnd c l = 5pf g = ?1 4.309v +10mv figure 28b. ou tput swing vs. load reference volt age, v s = +5 v, g = ? 4.5v 3.5v 2.5v 1.5v 0.5v 20ns 500mv v s = +5v g = +2 r l = 2k v in = 1v p-p c l = 5pf figure 29. one volt step response, v s = +5 v, g = +2 2.6v 2.55v 2.5v 2.45v 2.4v v s = +5v g = +1 r l = 2k c l = 5pf 40ns 50mv figure 30. 100 mv step response, v s = +5 v, g = +1 3v 2.5v 2v 1.5v 1v 0.5v 0v 200 s 500mv v in = 3v p-p r l = 2k c l = 5pf v s = +3v g = ?1 +22mv +2.920v figure 31. output swing, v s = +3 v 1.56v 1.52v 1.48v 1.44v 1.40v 1.42v 1.46v 1.50v 1.54v 20ns 20mv v i n = 0.1v p-p r l = 2k c l = 5pf v s = +3v g = +1 1.58v 1.60v figure 32. step response, g = +1, v in = 100 mv ?0 rev. b
ad8044 rev. b ?1 overdrive recovery overdrive of an amplifier occurs when the output and/or input range are exceeded. the amplifier must recover from this over- drive condition. as shown in figure 33, the ad8044 recovers within 50 ns from negative overdrive and within 25 ns from positive overdrive. 50ns 1v v s = +5v a v = +2 r f = 2k r l = 2k v in 2v/div v out 1v/div 2v figure 33. overdrive recovery, vs + 5 v, v in = 4 v step circuit description the ad8044 is fabricated on analog devices?proprietary extra-fast complementary bipolar (xfcb) process which enables the construction of pnp and npn transistors with similar f t s in the 2 ghz? ghz region. the process is dielectri- cally isolated to eliminate the parasitic and latch-up problems caused by junction isolation. these features allow the construc- tion of high frequency, low distortion amplifiers with low supply currents. this design uses a differential output input stage to maximize bandwidth and headroom (see figure 34). the smaller signal swings required on the first stage outputs (nodes s1p , s1n ) re duce the effect of nonlinear currents due to junction capacitances and im prove the distortion performance. w ith this design harmonic distortion of better than ?5 db @ 1 mhz into 100 w with v out = 2 v p-p (gain = +2) on a single 5 volt supply is achieved. the ad8044? rail-to-rail output range is provided by a comple- mentary common-emitter output stage. high output drive capa- bility is provided by injecting all output stage predriver currents directly into the bases of the output devices q8 and q36. bias- ing of q8 and q36 is accomplished by i8 and i5, along with a common-mode feedback loop (not shown). this circuit topol- ogy allows the ad8044 to drive 50 ma of output current with the outputs within 0.5 v of the supply rails. on the input side, the device can handle voltages from ?.2 v below the negative rail to within 1.2 v of the positive rail. ex- ceeding these values will not cause phase reversal; however, the input esd devices will begin to conduct if the input voltages exceed the rails by greater than 0.5 v. driving capacitance loads the capacitive load drive of the ad8044 can be increased by adding a low valued resistor in series with the load. figure 35 shows the effects of a series resistor on capacitive drive for vary- ing voltage gains. as the closed-loop gain is increased, the larger phase margin allows for larger capacitive loads with less over- shoot. adding a series resistor with lower closed-loop gains accomplishes this same effect. for large capacitive loads, the frequency response of the amplifier will be dominated by the roll-off of the series resistor and capacitive load. sin r21 r3 v ee q11 q3 i10 r26 r39 q5 q4 q40 i7 r2 r15 q13 q17 r5 c7 q2 sip q22 q7 q21 q24 r23 r27 i2 i3 i1 q51 q25 q50 q39 q47 q27 q31 q23 i9 i5 v ee v cc i8 q36 q8 v out c3 c9 v cc v in p v in n v ee i11 figure 34. ad8044 simplified schematic
ad8044 rev. b ?2 a cl (v/v) 1000 100 10 16 2 capacitive load (pf) 34 5 v s = +5v < 30% overshoot r g r f c l r s v out v in 100mv step r s = 10 r s = 0 figure 35. capacitive load drive vs. closed-loop gain applications rgb buffer the ad8044 can provide buffering of rgb signals that include ground while operating from a single +3 v or +5 v supply. when driving two monitors from the same rgb video source it is necessary to provide an additional driver for one of the moni- tors to prevent the double termination situation that the second monitor presents. this has usually required a dual-supply op amp because the level of the input signal from the video driver goes all the way to ground during horizontal blanking. in single- supply systems it can be a major inconvenience and expense to add an additional negative supply. a single ad8044 can provide the necessary drive capability and yet does not require a negative supply in this application. fig- ur e 36 is a schematic that uses three amplifiers out of a single ad8044 to provide buffering for a second monitor. the source of the rgb signals is shown to be from a set of three current output dacs that are within a single-supply graphics ic. this is typically the situation in most pcs and workstations that may use either a standalone triple dac or dacs that are integrated into a larger graphics chip. during horizontal blanking, the current output from the dacs is turned off and the rgb outputs are pulled to ground by the termination resistors. if voltage sources were used for the rgb signals, then the termination resistors near the graphics ic would be in series and the rest of the circuit would remain the same. this is because a voltage source is an ac short circuit, so a series resistor is required to make the drive end of the line see 75 w to ac ground. on the other hand, a current source has a very high output impedance, so a shunt resistor is required to make the drive end of the line see 75 w to ground. in either case, the monitor terminates its end of the line with 75 w . the circuit in figure 36 shows minimum signal degradation when using a single-supply for the ad8044. the circuit per- forms equally well on either a +3 v or +5 v supply. a 1k 10 f +3v or +5v 75 0.1 f 1k 75 rgb monitor #2 v+ b 1k 75 1k c 1k 75 1k v? 75 75 75 75 75 rgb monitor #1 75 75 75 r g b +5v graphics ic ad8044 ad8044 ad8044 figure 36. single supply rgb video driver figure 37 is an oscilloscope photo of the circuit in figure 36 operating from a +3 v supply and driven by the blue signal of a color bar pattern. note that the input and output are at ground during the horizontal blanking interval. the rgb signals are specified to output a maximum of 700 mv peak. the output of the ad8044 is 1.4 v with the termination resistors providing a divide-by-two. v in gnd gnd v out 10 0% 100 90 5 s 500mv 500mv figure 37. +3 v, rgb buffer
ad8044 rev. b ?3 active filters active filters at higher frequencies require wider bandwidth op amps to work effectively. excessive phase shift produced by lower frequency op amps can significantly impact active filter performance. figure 38 shows an example of a 2 mhz biquad bandwidth filter that uses three op amps of an ad8044 package. such cir cuits are sometimes used in medical ultrasound systems to l ower the noise bandwidth of the analog signal before a/d conversion. 2 3 1 r1 3k v in r2 2k c1 50pf r3 2k 6 5 7 r6 1k r5 2k 9 10 8 ad8044 ad8044 ad8044 c2 50pf v out r4 2k figure 38. 2 mhz biquad band-pass filter using ad8044 the frequency response of the circuit is shown in figure 39. frequency ( hz ) 0 ?10 10k 100m 100k gain (db) 1m 10m ?20 ?30 ?40 figure 39. frequency response of 2 mhz band-pass biquad filter layout considerations the specified high speed performance of the ad8044 requires careful attention to board layout and component selection. proper rf design techniques and low-pass parasitic component selection are necessary. the pcb should have a ground plane covering all unused por- tions of the component side of the board to provide a low im- pedance path. the ground plane should be removed from the area near the input pins to reduce the stray capacitance. chip capacitors should be used for the supply bypassing. one end should be connected to the ground plane and the other within 1/8 inch of each power pin. an additional large (0.47 m f ?10 m f) tantalum electrolytic capacitor should be connected in parallel, but not necessarily so close, to supply current for fast, large signal changes at the output. the feedback resistor should be located close to the inverting input pin in order to keep the stray capacitance at this node to a minimum. capacitance variations of less than 1 pf at the invert- ing input will significantly affect high speed performance. stripline design techniques should be used for long signal traces (greater than about 1 inch). these should be designed with a characteristic impedance of 50 w or 75 w and properly termi- nated at each end.
ad8044 rev. b ?4 outline dimensions 14-lead plastic dual in-line package [pdip] (n-14) dimensions shown in inches and (millimeters) 14 1 7 8 0.685 (17.40) 0.665 (16.89) 0.645 (16.38) 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.100 (2.54) bsc seating plane 0.180 (4.57) max 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.060 (1.52) 0.050 (1.27) 0.045 (1.14) 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) min controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design compliant to jedec standards mo-095-ab 14-lead standard small outline package [soic] narrow body (r-14) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design coplanarity 0.10 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) compliant to jedec standards ms-012ab
ad8044 rev. b ?5 ?5 revision history location page 8/04?ata sheet changed from rev. a to rev. b changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
?6 c01060??/04(b)

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